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Improving Risk Analysis Practices in Governmental Organizations

At the same time as our dependence on IT systems increases, the number of reports of problems caused by failures of critical IT systems has also increased. Today almost every system or service, e.g., water, power supply, transportation, is dependent on IT systems, and failure of these systems has serious and negative effects on society. In general, governmental organizations are responsible for de

Brownout: Building More Robust Cloud Applications

Self-adaptation is a first class concern for cloud applications, which should be able to withstand diverse runtime changes. Variations are simultaneously happening both at the cloud infrastructure level - for example hardware failures - and at the user workload level - flash crowds. However, robustly withstanding extreme variability, requires costly hardware over-provisioning. In this paper, we i

Identification of IT Incidents for Improved Risk Analysis by Using Machine Learning

Today almost every system or service, e.g., water, power supply, transportation, etc. is dependent on IT systems, and failure of these systems have serious and negative effects on the society. IT incidents are critical for the society as they can stop the function of critical systems and services. Moreover, in a software engineering context risk analysis is an important activity for the developmen

A 0.13µm CMOS ΔΣ PLL FM Transmitter

A short range FM transmitter is presented. It uses an architecture where the output frequency of a phase locked loop (PLL) is modulated by varying the division number of the feedback divider, using the 1-bit output of a ΔΣ ADC. The measured total harmonic distortion (THD) plus noise is less than 1% at 75 kHz deviation. The transmitter is fully integrated in a 0.13µm CMOS process and the core area

A 65nm CMOS 282uW 915MHz direct conversion receiver front-end

Abstract in UndeterminedThis paper presents an inductorless ultra-low power radio receiver front-end intended for applications such as sensor networks and medical implants. It consists of low noise amplifier, quadrature mixer, and a frequency divider for the generation of quadrature local oscillator signals. The power consumption is just 282μW from a 0.9V supply when it operates in the 915 MHz ISM

Adaptive Resource Scheduling for Energy Efficient QRD Processor with DVFS

This paper presents an energy efficient adaptive QR decomposition scheme for Long Term Evolution Advance (LTE-A) downlink system. The proposed scheme provides a performance robustness to fluctuating wireless channels while maintaining lower workload on a reconfigurable hardware. A statistic based algorithm-switching strategy is employed in the scheme to achieve workload reduction and stable comput

On Structured Realizability and Stabilizability of Linear Systems

We study the notion of structured realizability for linear systems dened over graphs. A stabilizable and detectable realization is structured if the state-space matrices inherit the sparsity pattern of the adjacency matrix of the associated graph. In this paper, we demonstrate that not every structured transfer matrix has a structured realization and we reveal the practical meaning of this fact. W

mm-Wave Pulse-Generation Circuits in 65nm CMOS

Three mm-wave pulse generation circuits fabricated in a standard 65nm CMOS process are presented. Two versions are based on the cross-coupled NMOS LC-VCO (500um × 300 um), and one is based on the Colpitts VCO (600um × 300 um). No additional buffers are used in the cross-coupled versions, as they are directly loaded by 50 Ohms through a balun. They can produce measured pulses exceeding 8dBm peak ou

A control-theoretical approach to thread scheduling for multicore processors

Feedback control has been applied to computing systems, usually taking a designed system and closing a loop to adjust some of its parameters. However, the design of computing systems components as controllers have shown advantages with respect to state-of-the-art techniques, especially in the scheduling domain, where uniprocessor schedulers have been designed as discrete-time control structures. H

A 2.7GHz divider-less all digital phase-locked loop with 625Hz frequency resolution in 90nm CMOS

A divider-less all digital phase locked loop (ADPLL) with a high frequency resolution is implemented. All blocks excluding digitally controlled oscillator (DCO) and time to digital converter (TDC) are realized in standard digital design which consumes less power. The DCO core adopts an improved source-varactor LC resonant tank to achieve a 20KHz frequency resolution. With the help of an additional

A 24-GHz 90-nm CMOS beamforming receiver front-end with analog baseband phase rotation

A 24 GHz 2-path beamforming receiver front-end in 90 nm CMOS is presented. It consists of two direct conversion front-ends followed by a baseband block performing phase rotation and signal combination. The baseband phase rotation is performed by combining the quadrature phases using digitally controlled weights, achieving a phase resolution of 11 degrees. From each of the two inputs the front-end

On the Kalman-Yakubovich-Popov Lemma for Positive Systems

An extended Kalman-Yakubovich-Popov (KYP) Lemma for positive systems is derived. The main difference compared to earlier versions is that non-strict inequalities are treated. Matrix assumptions are also less restrictive. Moreover, a new equivalence is introduced in terms of linear programming rather than semi-definite programming. As a complement to the KYP lemma, it is also proved that a symmetri